1. Field of the Invention
The present invention relates to a digital demodulator of a high-definition television (HDTV). Particularly, this invention is a digital demodulator for restoring signals, transmitted in a vestigial-sideband (VSB) manner which is an HDTV transmission standard, to base band signals.
2. Discussion of Related Art
There are many kinds of demodulators. A conventional analog mode of them is shown in FIG. 1. An intermediate frequency (IF) input is respectively mixed with cos(.omega..sub.IF t) and a signal resulting from transit of the phase of cos(.omega..sub.IF t) by 90.degree. by a phase transit element 2 and the mixed results are converted into a base band by mixers 1 and 3. Analog low-pass filters (LPF) 4 and 5 filter off high frequency from the base band signals output by the mixers 1 and 3. The output signals of the analog low-pass filters 4 and 5 are then converted into digital signals I and Q by analog/digital (A/D) converters 6 and 7.
In this case, this conventional analog demodulator requires two IF mixers, two analog low-pass filters, and two A/D converters and its control is difficult. Moreover, relatively expensive parts such as a voltage controlled oscillator (VCQ) must be used. This analog mode also has a disadvantageous application specific IC (ASIC) aspect.
There is another conventional digital demodulation method, as shown in FIG. 2, where sampling is performed with respect to IF signals and the IF signals are then down-converted into base band signals. In other words, IF input is converted into a digital signal by an A/D converter 8 using sampling frequency where its frequency is four times of the IF signal at least. Multiplication of the digital signals from the A/D converter 8 is performed by a multiplier 9. The multiplied signals are sorted and converted into base band signals I and Q by a sorter 10.
FIG. 3 illustrates a typical example of the conventional digital demodulator that converts VSB signals received into digital signals by sampling.
Reference number 11 is a mixer 11 for mixing an IF signal input with oscillation frequency generated by a voltage controlled oscillator 18. 12 denotes a low-pass filter for filtering off high frequency from the frequency generated by the mixer 11 and producing a frequency band of 10.76 MHz. 13 represents an A/D converter for converting the signals from the low-pass filter 12 into digital signals using 21.52 MHz sampling frequency. 14 is a mixer for mixing the digital signals from the A/D converter 14 with 5.38 MHz frequency. 15 is a sorter for sorting the signals generated by the mixer 14 and producing base band signals I and Q. 16 denotes a frequency and phase detector for detecting frequency and phase errors from the base band signals I and Q supplied by the sorter 15 and producing pulse width modulation (PWM) signals according to the detected value. 17 is a low-pass filter for performing low-pass filtering with respect to the PWM signals generated by the frequency and phase detector 16. 18 is a voltage controlled oscillator (VCO) for controlling output oscillation frequency according to a control voltage generated by the low-pass filter 17.
A digital demodulator having such configuration using conventional IF sampling method is a form of appropriate combination of digital and analog modes. There occur some problems difficult to resolve when this structure is implemented in hardware. First, this method requires a voltage controlled crystal oscillator (VCXO) having a high output frequency swing (100 kHz) or VCO where precise control is possible. However, an actually available VCXO has a control input of 0 to 6V and an output swing of maximum 200 ppm (8 kHz at 40 MHz). For an actual VCO, a control input is 0 to 6V and an output swing is minimum 10% (4 MHz at 40 MHz). They cannot satisfy the output frequency swing (100 kHz) condition proposed by Zenith Company. Secondary, even if there is a VCO satisfying the above condition, a D/A converter over 18 bits at least which operates at 1.4 MHz or more is required for precise control, thereby making it difficult to implement hardware.
There are different ways for converting IF signals of VSB into digital base band signals. FIG. 4 shows a digital demodulator using hilbert transform of the ways.
Reference number 19 is an A/D converter for converting VSB IF signals input into digital signals. 20 is a delay circuit for delaying the digital signals from the A/D converter 19 until the time of hilbert transform. 21 is a decimation circuit for producing the base band signal I by performing filtering with respect to the digital signal from the delay circuit 20 with a decimation filter. 22 denotes a hilbert transform unit 22 for performing filtering with respect to the digital signal from the A/D converter 19 with a hilbert transform filter. 23 is a decimation unit for producing the base band signal Q by performing filtering with respect to the digital signal from the hilbert transform unit 22 with a decimation filter.
In such a digital process mode using the hilbert transform, as described above, sampling is performed with respect to the IF signal extracted from the VSB signal received with an established sampling signal and then the signal is quantized and converted into a digital signal by the A/D converter 19. The digital signal from the A/D converter 19 is delayed until the time of hilbert transform by the delay circuit 20 and converted into the base band signal I through the decimation filtering by the decimation unit 21. On the other hand, the digital signal from the A/D converter 19, after passing through the hilbert filtering at the hilbert transform unit 22 and the decimation filtering at the decimation unit 23, is converted into the base band signal Q.
The VSB demodulator has a frequency and phase detector for detecting frequency and phase errors from a signal input and compensating the signal received. A representative method used by the detector is to estimate the frequency and phase using a balanced quadricorrelator. This balanced quadricorrelator method is shown in FIG. 5.
Reference numbers 24 and 25 denote mixers for respectively mixing two kinds of frequencies generated by a phase transit element (not shown) with an input signal V.sub.IN (t). 26 and 27 are low-pass filters for performing low-pass filtering with respect to the each signal of the mixer 24 and 25. Reference numbers 28 and 29 represent differentiators for respectively differentiating the signals V.sub.I (t) and V.sub.Q (t) from the low-pass filters 26 and 27. 30 is a mixer for mixing the signal output by the differentiator 28 with the signal output by the low-pass filter 27. 31 is a mixer for mixing the signal output by the low-pass filter 26 with the signal output by the differentiator 29. 32 represents an adder for summing up the signals output by the two mixers 30 and 31 and producing a frequency and phase error signals V.sub.D (t).
In such a frequency and phase detector applied to the conventional VSB demodulator, the mixers 24 and 25 respectively multiply the received signal V.sub.IN (t) by cos .omega..sub.0 t and sin .omega..sub.0 t. The two low-pass filters 26 and 27 perform the low-pass filtering with respect to the result values of multiplication respectively and producing the base band signals V.sub.I (t) and V.sub.Q (t). A frequency estimation error and a phase are detected by differentiating the base band signals V.sub.I (t) and V.sub.Q (t) with the differentiators 28 and 29 and then obtaining their change ratios.
When the signal received is expressed as a formula (1), V.sub.in (t)=V.sub.s cos(.omega..sub.i t+.theta.), respective outputs by the low-pass filters 26 and 27 are represented with a formula (2), V.sub.I (t)=V.sub.s K.sub.m cos(.DELTA..omega.t+.theta.) and formula (3), V.sub.Q (t)=V.sub.s K.sub.m sin(.DELTA..omega.t+.theta.), and the outputs by the differentiators 28 and 29 are represented with a formula (4), T.sub.d dv.sub.I (t)/dt=.DELTA..omega.T.sub.d V.sub.s K.sub.m sin(.DELTA..omega.t+.theta.), and formula (5), T.sub.d dv.sub.Q (t)/dt=-.DELTA..omega.T.sub.d V.sub.s K.sub.m cos(.DELTA..omega.t+.theta.), wherein T.sub.d is a gain of the differentiator and expressed as .DELTA..omega.=.omega..sub.i -.omega..sub.0.
Therefore, V.sub.d (t)=V.sub.Q (t)(dv.sub.I (t)/dt)-V.sub.Q (t)(dv.sub.Q (t)/dt)=2T.sub.d (V.sub.s K.sub.m).sup.2 .DELTA..omega. . . . (6). As we can see from the formula (6), a frequency error can be estimated regardless of an input phase .theta.. When digitalizing this structure, only with a relatively simpler XOR gate instead of a multiplier, satisfactory compensation for the frequency error can be achieved.
When .DELTA..omega.=0 or &lt;&lt;1 in the formula (3), V.sub.Q (t)=V.sub.s K.sub.m sin(.theta.).apprxeq.V.sub.s K.sub.m .theta. . . . (7). So, a phase error can be estimated from the signal Q.
If the balanced quadricorrelator shown in FIG. 5 is digitalized, it has the configuration as illustrated in FIG. 6. Reference numbers 24, 25, 26, 27, 30, 31, and 32 perform the same function as 24, 25, 26, 27, 30, 31, and 32 shown in FIG. 5. Number 33 and 34 are A/D converters for converting the analog base band signals from the low-pass filters 26 and 27 into the digital base band signals. 35 and 36 denote delay circuits for delaying the signals output by the A/D converters 33 and 34 during a predetermined period of time. 37 is an A/D converter for converting the frequency error signal from the adder 32 into a digital signal. 38 is a loop filter for performing filtering with respect to the output by the A/D converter 37. 39 is a VCO for altering an oscillation frequency according to the signal from the loop filter 38 as control voltage. 40 is a phase transit element for changing the phase of the oscillation frequency output by the VCO 39 by 90.degree..
There is no differentiator in FIG. 6. Approximation is obtained like dv(t)/dt.apprxeq.[v(k.DELTA.T)-v((k-1).DELTA.T)]/.DELTA.T . . . (8). When k.DELTA.T=n, V.sub.d (t).apprxeq.[v.sub.I (n)v.sub.Q (n-1)-v.sub.I (n-1)v.sub.Q (n)]/.DELTA.T . . . (9), so the digitalization of the balanced quadricorrelator is accomplished.
As mentioned before, however, the conventional digital VSB demodulator must use an expensive VCO, disturbing commercialization, and its frequency and phase detector utilizes many multipliers, making the configuration of hardware complex. In addition, since a portion of the demodulation circuit employs analog process mode, implementation of hardware and ASIC is difficult.